industrial temperature range idt74fct162240at/ct fast cmos 16-bit buffer/line driver 1 april 2002 idt74fct162240at/ct industrial temperature range fast cmos 16-bit buffer/line driver description: the fct162240t 16-bit buffer/line driver is built using advanced dual metal cmos technology. these high-speed, low-power devices offer bus/backplane interface capability with improved packing density. the flow-through organiza- tion of signal pins simplifies layout. the three-state controls are designed to operate these devices in a quad-nibble, dual-byte or single 16-bit word mode. all inputs are designed with hysteresis for improved noise margin. the fct162240t have balanced output drive with current limiting resistors. this offers low ground bounce, minimal undershoot, and controlled output fall times?reducing the need for external series terminating resistors. the fct162240t is a plug-in replacement for fct16240t and 74abt16240 for on-board interface applications. 3 oe 3 a 1 3 a 2 3 a 3 3 a 4 3 y 1 3 y 2 3 y 3 3 y 4 1 y 1 1 y 2 1 y 3 1 y 4 1 a 1 1 a 2 1 a 3 1 a 4 1 oe 4 oe 4 a 1 4 a 2 4 a 3 4 a 4 4 y 1 4 y 2 4 y 3 4 y 4 2 oe 2 a 1 2 a 2 2 a 3 2 a 4 2 y 1 2 y 2 2 y 3 2 y 4 the idt logo is a registered trademark of integrated device technology, inc. ? 2002 integrated device technology, inc. dsc-5464/6 features: ? 0.5 micron cmos technology ? high-speed, low-power cmos replacement for abt functions ? typical t sk (o) (output skew) < 250ps ? low input and output leakage 1a (max.) ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ?v cc = 5v 10% ? balanced output drivers: 24ma ? reduced system switching noise ? typical v olp (output ground bounce) < 0.6v at v cc = 5v, t a = 25c ? available in ssop and tssop packages functional block diagram
industrial temperature range 2 idt74fct162240at/ct fast cmos 16-bit buffer/line driver ssop/ tssop top view pin configuration 1 a 1 1 a 2 gn d 1 a 3 1 a 4 v cc 2 a 1 2 a 2 2 a 3 2 a 4 3 a 1 3 a 2 3 a 3 3 a 4 v cc 4 a 1 4 a 3 4 a 4 4 a 2 gn d gn d gn d 2 o e 3 o e 39 29 30 31 32 33 34 35 36 37 38 25 26 27 28 48 47 41 42 43 44 45 46 40 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11 21 22 23 24 gn d 1 o e gn d v cc gn d 4 o e 4 y 4 4 y 3 4 y 2 4 y 1 3 y 4 3 y 3 3 y 2 3 y 1 2 y 4 2 y 2 2 y 1 1 y 4 1 y 3 1 y 1 1 y 2 v cc gn d 2 y 3 symbol description max unit v term (2) terminal voltage with respect to gnd ?0.5 to +7 v v term (3) terminal voltage with respect to gnd ?0.5 to v cc +0.5 v t stg storage temperature ?65 to +150 c i out dc output current ?60 to +120 ma absolute maximum ratings (1) (1) (1) (1) (1) notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. all device terminals except fct162xxx output and i/o terminals. 3. output and i/o terminals terminals for fct162xxx. symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3.5 6 pf c out output capacitance v out = 0v 3.5 8 pf capacitance (t a = +25c, f = 1.0mhz) note: 1. this parameter is measured at characterization but not tested. pin names description x oe 3-state output enable inputs (active low) x a x data inputs x y x 3-state outputs pin description note: 1. h = high voltage level x = don?t care l = low voltage level z = high-impedance inputs outputs x oe xax x y x llh lhl hxz function table (1)
industrial temperature range idt74fct162240at/ct fast cmos 16-bit buffer/line driver 3 symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 ? ? v v il input low level guaranteed logic low level ? ? 0.8 v i ih input high current (input pins) (5) v cc = max. v i = v cc ?? 1a input high current (i/o pins) (5) ?? 1 i il input low current (input pins) (5) v i = gnd ? ? 1 input low current (i/o pins) (5) ?? 1 i ozh high impedance output current v cc = max. v o = 2.7v ? ? 1a i ozl (3-state output pins) (5) v o = 0.5v ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i os short circuit current v cc = max., v o = gnd (3) ?80 ?140 ?250 ma v h input hysteresis ? ? 100 ? mv i ccl quiescent power supply current v cc = max. ? 5 500 a i cch v in = gnd or v cc i ccz dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = ?40c to +85c, v cc = 5.0v 10% symbol parameter test conditions (1) min. typ. (2) max. unit i odl output low current v cc = 5v , v in = v ih or v il, v o = 1.5v (3) 60 115 200 ma i odh output high current v cc = 5v , v in = v ih or v il, v o = 1.5v (3) ?60 ?115 ?200 ma v oh output high voltage v cc = min i oh = ?24ma 2.4 3.3 ? v v in = v ih or v il v ol output low voltage v cc = min i oh = 24ma ? 0.3 0.55 v v in = v ih or v il output drive characteristics notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. not more than one output should be tested at one time. duration of the test should not exceed one second. 4. duration of the condition can not exceed one second. 5. this test limit for this parameter is 5a at t a = ?55c.
industrial temperature range 4 idt74fct162240at/ct fast cmos 16-bit buffer/line driver symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. ? 0.5 1.5 ma ttl inputs high v in = 3.4v (3) i ccd dynamic power supply v cc = max. v in = v cc ? 60 100 a / current (4) outputs open v in = gnd mhz x oe = gnd one input toggling 50% duty cycle i c total power supply current (6) v cc = max. v in = v cc ? 0.6 1.5 ma outputs open v in = gnd fi = 10mhz 50% duty cycle v in = 3.4v ? 0.9 2.3 x oe = gnd v in = gnd one bit toggling v cc = max. v in = v cc ? 2.4 4.5 (5) outputs open v in = gnd fi = 2.5mhz 50% duty cycle v in = 3.4v ? 6.4 16.5 (5) x oe = gnd v in = gnd sixteen bits toggling notes: 1. for conditions shown as min. or max., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input; (v in = 3.4v). all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + i cc d h n t + i ccd (f cp n cp /2 + fini) i cc = quiescent current (i ccl , i cch and i ccz ) i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp fi = input frequency ni = number of inputs at fi power supply characteristics notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. fct162240at fct162240ct symbol parameter condition (1) min. (2) max. min. (2) max. unit t plh propagation delay c l = 50pf 1.5 4.8 1.5 3.4 ns t phl xax to x y xr l = 500 t pzh output enable time 1.5 6.2 1.5 4.4 ns t pzl t phz output disable time 1.5 5.6 1.5 4.1 ns t plz t sk(o) output skew (3) ? 0.5 ? 0.5 ns switching characteristics over operating range
industrial temperature range idt74fct162240at/ct fast cmos 16-bit buffer/line driver 5 test circuits and waveforms pulse generator r t d.u.t. v cc v in c l v out 50pf 500 500 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h preset clear clock enable etc. high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width test switch open drain disable low closed enable low all other tests open switch position definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; t f 2.5ns; t r 2.5ns.
industrial temperature range 6 idt74fct162240at/ct fast cmos 16-bit buffer/line driver ordering information idt xx temp. range xxxx device type xx package 240at 240ct 16-bit buffer/line driver 74 ? 40c to +85c 162 double-density, 5 volt, balanced drive pv pa shrink small outline package thin shrink small outline package fct xxx family corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or 408-284-8200 logichelp@idt.com san jose, ca 95138 fax: 408-284-2775 www.idt.com
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